Development of a revolutionary power sensor

Project framework:

Recently National Instruments has embraced the RF business to provide tools which allow RF engineers to address their challenges in an efficient way. As such today National Instruments provides a series of Vector Signal Generators, Vector Signal Analyzers, Vector Network Analyzers, high-frequency scopes, modulation toolkits and much more. Other innovative products such as the VST (Vector Signal Transceiver) which combines a Vector Signal Analyzer, a fully user-programmable FPGA and a Vector Signal Generator were recently introduced. Through its Network Analysis Center of Excellence, NI currently supports an eco-system of source- and  load-pull providers to address the needs of power amplifier designers who need to study the behavior of their components under different source and load conditions.

Project description:

High-frequency power sensors are ~50 Ohm devices which measure the power that is dissipated into its internal 50 Ohm. Usually a power sensor is used to figure out how much power is available at the location where one connects the power sensor. Unfortunately the impedance of the power source (for instance the output of a power amplifier) most of the time is not 50 Ohm. As such the power indicated by the power sensor does not correspond to the power which is really available. The goal of this project is the development of a clever power sensor which will figure out what the available power really is by adapting its own impedance to maximize the power delivered into the power sensor. Therefore, the power sensor will be able not only to provide the available power from the source but also to give the impedance of that source.

Description of innovativeness and innovative goals of the project:

The innovative goal of the project is to use a state-of-the-art tuning chip, which allows to "present" different impedances to the device under test. Commercial tuning chips are available from companies such as WiSpry and Peregrine and are digitally controlled by standardized protocols such as MIPI. Initially this chip can be used in combination with a classical power meter instrument. In a next stage this power meter can be replaced by a power meter chip, which is provided by companies such as ADI. The first main challenge for this project is the stability, repeatability and characterization of the S-parameters of the tuning chip. The other main challenge is to develop an efficient search algorithm to find the impedance corresponding to the optimal delivered power.

Expected deliverables and output at the end of the internship:

A first deliverable is a setup with tuning chip and a classical power sensor where the feasibility of the idea is proven. A second deliverable is a report focusing on the stability, repeatability and characterization of the load impedance presented by the tuning chip and its mapping onto the different possible states. A third deliverable is a working efficient search algorithm to find the optimal delivered power for a selected power amplifier module in combination with a classical power meter. If time allows, an additional deliverable is the production of a small PCB which combines the tuning chip and a power meter chip and to verify if the results which were obtained using a classical power meter can be reproduced.

Promoters

Yves Rolain
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